AI-Augmented Fault Detection and Diagnosis in VLSI Circuits: A Step toward Intelligent Chip Design

https://doi.org/10.55529/jaimlnn.46.39.46

Authors

  • Ayush Kumar Ojha UG at SSSUTMS, Bhopal, India.

Keywords:

AI-Augmented Fault Detection, VLSI Circuits, Machine Learning in Electronics, Neural Networks for Fault Diagnosis, Intelligent Chip Design.

Abstract

Fault detection and diagnosis are critical challenges in Very Large Scale Integration (VLSI) circuits, where even minor defects can cause significant performance degradation or system failure. Traditional fault detection methods often struggle with scalability and real-time analysis as circuits grow increasingly complex. This paper proposes an AI-augmented framework that leverages machine learning algorithms and neural networks to enhance the fault detection process in VLSI circuits. The proposed model not only identifies and classifies faults with high accuracy but also provides root-cause diagnostics, significantly reducing testing time and maintenance costs. Simulation results demonstrate the effectiveness of the AI-based approach in comparison with conventional techniques, showcasing improved fault coverage, faster detection, and scalability for modern chip designs. This study serves as a step toward the integration of intelligent diagnostics into chip manufacturing, paving the way for more robust and self-healing electronic systems.

Published

2024-10-23

How to Cite

Ayush Kumar Ojha. (2024). AI-Augmented Fault Detection and Diagnosis in VLSI Circuits: A Step toward Intelligent Chip Design. Journal of Artificial Intelligence,Machine Learning and Neural Network , 4(6), 39–46. https://doi.org/10.55529/jaimlnn.46.39.46

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